AMD "Tonga" Silicon Features 384-bit Wide Memory Interface

In what could explain the rather large die-size and transistor-count of AMD's "Tonga" silicon, compared to "Tahiti," it turns out that the silicon features a 384-bit wide GDDR5 memory interface, and not the previously thought of 256-bit wide one. The die is placed on a package with pins for just 256-bit, on the Radeon R9 285, but it can be placed on a bigger package, with more pins, to wire out the full width of the memory bus, in future SKUs. This isn't the first time AMD has done something like this. Its "Tahiti LE" chip was essentially a "Tahiti" die placed on a smaller package with pins for just a 256-bit wide bus, on the oddball Radeon HD 7870 XT.



What this means is that AMD's next performance-segment graphics card based on the "Tonga" silicon, could feature 50% more memory bandwidth than the R9 285. The stream processor count is still 2,048, but these are more advanced Graphics CoreNext 1.2 stream processors, compared to first-generation ones on "Tahiti," offering more performance per Watt. The TMU count remains 128, although there's no clarity on the ROP count. Estimates are split between 32 and 48. The R9 285 has 32, and so does "Tahiti."

http://ift.tt/1pnt4Mb